In general, memory management systems translate the logical addresses of executive and user programs into physical addresses available in the system memory address space. This facility allows more flexible utilization of physical memory through the logical concatenation of non-contiguous memory areas to accomodate the requirements of specific programs. In addition, the logical address space of the processor can be effectively multiplied with each defined mapping, allowing utilization of a much greater physical address space than would otherwise be available. Such memory management systems often provide protection against unauthorized access, such as preventing user programs from accessing executive-reserved memory, and write protection to preclude inadvertant writing to read-only reserved memory.
In all known prior art memory management systems, the executive program was responsible for assigning the physical memory required by each program. Typically, the executive performed various logical-to-physical address checking procedures to preclude mapping of any given logical address into more than one physical address. However, routines capable of preventing all such mapping conflicts are tend to be quite complicated and significantly increase system overhead. Unfortunately, the consequences of encountering such a conflict during program execution are often more costly.